| 000 -LEADER |
|---|
| fixed length control field |
00800nam a22002177a 4500 |
| 005 - DATE AND TIME OF LATEST TRANSACTION |
|---|
| control field |
20160503133408.0 |
| 008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION |
|---|
| fixed length control field |
160503b xxu||||| |||| 00| 0 eng d |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER |
|---|
| International Standard Book Number |
0898381649 |
| 040 ## - CATALOGING SOURCE |
|---|
| Transcribing agency |
UG |
| 050 ## - LIBRARY OF CONGRESS CALL NUMBER |
|---|
| Classification number |
TK7868 |
| Item number |
L6 L63 |
| 245 ## - TITLE STATEMENT |
|---|
| Title |
Logic minimization algorithms for VLSI synthesis / |
| Statement of responsibility, etc |
Robert K. Brayton....[et al . - |
| 260 ## - PUBLICATION, DISTRIBUTION, ETC. (IMPRINT) |
|---|
| Place of publication, distribution, etc |
Boston : |
| Name of publisher, distributor, etc |
Kluwer Academic Pub., |
| Date of publication, distribution, etc |
1984 |
| 300 ## - PHYSICAL DESCRIPTION |
|---|
| Extent |
ix, 193 p. : |
| Other physical details |
ill. - |
| 490 ## - SERIES STATEMENT |
|---|
| Series statement |
The Kluwer international series in engineering and computer science |
| 504 ## - BIBLIOGRAPHY, ETC. NOTE |
|---|
| Bibliography, etc |
Bibliography:p.174-190 |
| 650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM |
|---|
| Topical term or geographic name as entry element |
Logic design. |
| 9 (RLIN) |
20038 |
|
|---|
| Topical term or geographic name as entry element |
Integrated circuits-Very large scale integration. |
|
|---|
| Topical term or geographic name as entry element |
Integrated circuits-Design and construction-Data Processing |
|
|---|
| Topical term or geographic name as entry element |
Algorithms |
| 9 (RLIN) |
9181 |
| 942 ## - ADDED ENTRY ELEMENTS (KOHA) |
|---|
| Entry Department |
Law and Social Science |
| Source of classification or shelving scheme |
|